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電子技術(shù)工程師英文簡(jiǎn)歷表格
個(gè)人簡(jiǎn)歷的排版就是一個(gè)細(xì)節(jié)部分，從具體個(gè)人簡(jiǎn)歷的內(nèi)容上來(lái)說(shuō)，對(duì)其內(nèi)涵的影響不是很大。但是排版關(guān)系到個(gè)人簡(jiǎn)歷的美觀度，也關(guān)系到個(gè)性化個(gè)人簡(jiǎn)歷的塑造。在一定程度上也是能夠關(guān)系到個(gè)人簡(jiǎn)歷的整體質(zhì)量，因此在設(shè)計(jì)簡(jiǎn)歷時(shí)，要注意到排版問(wèn)題，保證在基本的排版中來(lái)顯示出自身的個(gè)性化。
在寫(xiě)作中出現(xiàn)一些小錯(cuò)誤是很常見(jiàn)的，那么在寫(xiě)個(gè)人簡(jiǎn)歷的時(shí)候也可能會(huì)出現(xiàn)一些小的錯(cuò)誤，那么是不是說(shuō)對(duì)方就能容忍這種錯(cuò)誤呢?當(dāng)然不是!現(xiàn)在的個(gè)人簡(jiǎn)歷基本上都是提前寫(xiě)好的，有充足的時(shí)間來(lái)檢查修改。而在這樣的檢查修改中都不能發(fā)現(xiàn)錯(cuò)誤，只能說(shuō)明一點(diǎn)，你是一個(gè)馬虎大意的人，那么在篩選個(gè)人簡(jiǎn)歷的自然是作為被淘汰的對(duì)象。都知道在寫(xiě)個(gè)人簡(jiǎn)歷的時(shí)候要揚(yáng)長(zhǎng)避短，但是揚(yáng)長(zhǎng)避短并非要寫(xiě)虛假的信息，尤其是一些具有影響力的不真實(shí)信息，作為個(gè)人簡(jiǎn)歷的細(xì)節(jié)部分也需要避免。
| Name：yjbys | Sex： | ||||
| Date of Birth： | Hukou： | ||||
| Residency： | Work Experience： | ||||
| Current Salary： | Tel： | ||||
| E-mail：www.ruiwen.com/jianli | |||||
| Career Objective | |||||
| Desired Industry： | Electronics/Semiconductor/IC | ||||
| Desired Position： | IC Design/Application Engineer | ||||
| Desired address： | Shanghai ,Beijing ,Shenzhen | Desired Salary： | ￥10,000-14,999/Month | ||
| Work Experience | |||||
| 2003/02—Present | ***Company | ||||
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Industry: Electronics/Semiconductor/IC R&D IC Design/Application Engineer Responsibilities： Analog circuits design include CMOS Operational Amplifiers design, Switched Capacitor circuits, clock detecting, clock design, bandgap, PLL, power on reset etc Attend system design use matlab and verify the data from hspice using matlab digital synthesis using Synopsys_DC, timing analysis, Formality, create circuit framework, P&R using Apollo Interaction with layout designer for analog circuit’s layout. |
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| 2001/02—2003/02 | STATE Microelectronics Co. LTD | ||||
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Industry: Electronics/Semiconductor/IC R&D IC Design/Application Engineer Responsibilities： Create model of unit, circuit analysis and simulation, writing test coding, chip testing Study IC design tools: hspice star_sim verilog_XL NCverilog Synopsys Design Compiler/Analyzer etc Study Computer architecture. |
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| 2000/07—2001/02 | LianShun(DaLian) Microelectronics Co. Limited | ||||
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Industry: Electronics/Semiconductor/IC R&D IC Design/Application Engineer Responsibilities： Practice in IC foundry for 2 months; Study drawing layout、circuit simulation 、writing program use verilog Participate in designing the chip for music. |
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| Education and Training | |||||
| 1996/09—2000/07 | Hunan University Microelectronics Bachelor | ||||
| Circuit; Analog/digital/high frequency electronics technique; HW and interface of computer; Programming of ASM; C programming; IC theory; IC application; Microelectronic devices; Transistor theory ; Semiconductor Physics , Professional physical ,theory and application of sensor, Theory of TV etc | |||||
| Professional Skills | |||||
| Language Skills： | English GOOD | ||||
| Self-appraisal | |||||
| Aspire to employ new ideas, concepts, methods and technologies Energetic and self-motivated team player Excellent communication, interpersonal, and leadership skills Thrive in both independent and collaborative work environments. | |||||
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